Next Data Registers H, L (Ndrh, Ndrl) - Renesas H8SX/1520 Series Hardware Manual

Section 10 Programmable Pulse Generator (PPG)
• PODRL
Bit Bit Name
7 POD7
6 POD6
5 POD5
4 POD4
3 POD3
2 POD2
1 POD1
0 POD0
10.3.3

Next Data Registers H, L (NDRH, NDRL)

NDRH and NDRL store the next data for pulse output. The NDR addresses differ depending on
whether pulse output groups have the same output trigger or different output triggers.
• NDRH
Bit
NDR15
Bit Name
Initial Value
R/W
• NDRL
Bit
Bit Name
Initial Value
R/W
Rev. 3.00 Mar. 14, 2006 Page 350 of 804
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Initial
Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
7 6
NDR14 NDR13
0 0
R/W R/W
7 6
NDR7 NDR6 NDR5
0 0
R/W R/W
Description
Output Data Register 7 to 0
For bits which have been set to pulse output by NDERL,
the output trigger transfers NDRL values to this register
during PPG operation. While NDERL is set to 1, the CPU
cannot write to this register. While NDERL is cleared, the
initial output value of the pulse can be set.
5 4
NDR12 NDR11
0 0
R/W R/W R/W
5 4
NDR4 NDR3
0 0
R/W R/W R/W
3 2 1
NDR10 NDR9
0 0 0
R/W R/W
3 2 1
NDR2 NDR1
0 0 0
R/W R/W
0
NDR8
0
R/W
0
NDR0
0
R/W