Renesas H8SX/1520 Series Hardware Manual page 505

32-bit cisc microcomputer
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Bit
Bit Name
11
IRR3
10
IRR2
9
IRR1
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Initial
Value
R/W
0
R/(W)*
0
R
0
R
Section 13 Controller Area Network (HCAN)
Description
Transmit Overload Warning Interrupt Flag
Status flag indicating the error warning state
caused by the transmit error counter.
[Setting condition]
When TEC ≥ 96
[Clearing condition]
Writing 1
(When the CPU is used to clear this flag by
writing 1 while the corresponding interrupt is
enabled, be sure to read the flag after writing 1 to
it.)
Remote Frame Request Interrupt Flag When
MBIMR = 0
Status flag indicating that a remote frame has
been received in a mailbox (buffer).
[Setting condition]
When remote frame reception is completed,
when corresponding MBIMR = 0
[Clearing condition]
Clearing of all bits in RFPR (remote request
register)
Receive Message Interrupt Flag When
MBIMR = 0
Status flag indicating that a mailbox (buffer)
receive message has been received normally.
[Setting condition]
When data frame or remote frame reception is
completed, when corresponding MBIMR = 0
[Clearing condition]
Clearing of all bits in RXPR (receive complete
register)
Rev. 3.00 Mar. 14, 2006 Page 467 of 804
REJ09B0104-0300

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