Renesas H8SX/1520 Series Hardware Manual page 623

32-bit cisc microcomputer
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Flash Transfer Destination Address Register (FTDAR)
FTDAR specifies the start address of the on-chip RAM at which to download an on-chip program.
FTDAR must be set before setting the SCO bit in FCCS to 1.
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
7
TDER
6
TDA6
5
TDA5
4
TDA4
3
TDA3
2
TDA2
1
TDA1
0
TDA0
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7
6
TDER
TDA6
TDA5
0
0
R/W
R/W
R/W
Initial
Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Section 17 Flash Memory (0.18-(m F-ZTAT Version)
5
4
3
TDA4
TDA3
0
0
0
R/W
R/W
Description
Transfer Destination Address Setting Error
This bit is set to 1 when an error has occurred in setting
the start address specified by bits TDA6 to TDA0.
A start address error is determined by whether the value
set in bits TDA6 to TDA0 is within the range of H'00 to
H'02 when download is executed by setting the SCO bit
in FCCS to 1. Make sure that this bit is cleared to 0
before setting the SCO bit to 1 and the value of FTDAR
to should be within the range of H'00 to H'02.
0: The value specified by bits TDA6 to TDA0 is within
the range.
1: The value specified by bits TDA6 to TDA0 is
between H'03 and H'FF and download has stopped.
Transfer Destination Address
Specifies the on-chip RAM start address of the
download destination. A value between H'00 and H'02,
and up to 4 kbytes can be specified as the start address
of the on-chip RAM.
H'00:
H'FF9000 is specified as the start
address.
H'01:
H'FFA000 is specified as the start
address.
H'02:
H'FFB000 is specified as the start
address.
H'03 to H'7F: Setting prohibited.
(Specifying a value from H'03 to H'7F sets
the TDER bit to 1 and stops download of
the on-chip program.)
2
1
TDA2
TDA1
0
0
R/W
R/W
Rev. 3.00 Mar. 14, 2006 Page 585 of 804
REJ09B0104-0300
0
TDA0
0
R/W

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