Table 2.8 Shift Operation Instructions - Renesas H8SX/1520 Series Hardware Manual

Section 2 CPU
Table 2.8 Shift Operation Instructions
Instruction
SHLL
SHLR
SHAL
SHAR
ROTL
ROTR
ROTXL
ROTXR
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Size Function
(EAd) (shift) → (EAd)
B/W/L
Performs a logical shift on the contents of a general register or a memory
location.
The contents of a general register or a memory location can be shifted by
1, 2, 4, 8, or 16 bits. The contents of a general register can be shifted by
any bits. In this case, the number of bits is specified by 5-bit immediate
data or the lower 5 bits of the contents of a general register.
(EAd) (shift) → (EAd)
B/W/L
Performs an arithmetic shift on the contents of a general register or a
memory location.
1-bit or 2-bit shift is possible.
(EAd) (rotate) → (EAd)
B/W/L
Rotates the contents of a general register or a memory location.
1-bit or 2-bit rotation is possible.
(EAd) (rotate) → (EAd)
B/W/L
Rotates the contents of a general register or a memory location with the
carry bit.
1-bit or 2-bit rotation is possible.