Renesas H8SX/1520 Series Hardware Manual page 537

HCAN sleep mode is entered by setting the HCAN sleep mode bit (MCR5) to 1 in the master
control register (MCR). If the CAN bus is operating, the transition to HCAN sleep mode is
delayed until the bus becomes idle.
Either of the following methods of clearing HCAN sleep mode can be selected:
• Clearing by software
• Clearing by CAN bus operation
In order to re-enter CAN bus communication enabled state, eleven recessive bits must be received
after HCAN sleep mode was cleared.
(1)
Clearing by software
HCAN sleep mode is cleared by writing a 0 to MCR5 from the CPU.
(2)
Clearing by CAN bus operation
The cancellation method is selected by bit MCR7 setting in MCR. Clearing by CAN bus operation
occurs automatically when the CAN bus performs an operation and this change is detected. In this
case, the first message is not stored in a mailbox; messages will be received normally from the
second message onward. When a change is detected on the CAN bus in HCAN sleep mode, the
bus operation interrupt flag (IRR12) is set in the interrupt register (IRR). If the bus interrupt mask
(IMR12) in the interrupt mask register (IMR) is set to enable interrupts at this time, an interrupt
can be sent to the CPU.
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Section 13 Controller Area Network (HCAN)
Rev. 3.00 Mar. 14, 2006 Page 499 of 804
REJ09B0104-0300