Renesas H8SX/1520 Series Hardware Manual page 108

32-bit cisc microcomputer
Hide thumbs Also See for H8SX/1520 Series:
Table of Contents

Advertisement

Section 3 MCU Operating Modes
Bit
Bit Name
15, 14
13
MACS
12
11
10
9
8
RAME
7
FLSHE
6 to 2
1, 0
Rev. 3.00 Mar. 14, 2006 Page 70 of 804
REJ09B0104-0300
Downloaded from
Elcodis.com
electronic components distributor
Initial
Value
R/W
Descriptions
All 1
R
Reserved
These are read-only bits and cannot be modified.
0
R/W
MAC Saturation Operation Control
Selects either saturation operation or non-saturation
operation for the MAC instruction.
0: MAC instruction is non-saturation operation
1: MAC instruction is saturation operation
1
R
Reserved
This is a read-only bit and cannot be modified.
0
R/W
Reserved
This bit is always read as 0. The write value should
always be 0.
1
R/W
Reserved
This bit is always read as 1. The write value should
always be 1.
0
R/W
Reserved
This bit is always read as 0. The write value should
always be 0.
1
R/W
RAM Enable
Enables or disables the on-chip RAM. This bit is
initialized when the reset state is released. Do not write
0 during access to the on-chip RAM.
0: On-chip RAM disabled
1: On-chip RAM enabled
0
R/W
Flash Memory Control Register Enable
Controls accesses to the flash memory control
registers. Setting this bit to 1 enables to read from and
write to the flash memory control registers. Clearing this
bit to 0 disables the flash memory control registers. At
this time, the contents of the flash memory control
registers are retained. The write value should be 0
when the LSI is not the flash memory version.
0: Disables the flash memory control registers
1: Enables the flash memory control registers
All 0
R/W
Reserved
These bits are always read as 0. The write value should
always be 0.
All 1
R/W
Reserved
This bit is always read as 1. The write value should
always be 1.

Advertisement

Table of Contents
loading

Table of Contents