Sci Initialization (Clocked Synchronous Mode); Figure 12.15 Sample Sci Initialization Flowchart - Renesas H8SX/1520 Series Hardware Manual

12.6.2

SCI Initialization (Clocked Synchronous Mode)

Before transmitting and receiving data, first clear the TE and RE bits in SCR to 0, then initialize
the SCI as described in a sample flowchart in figure 12.15. When the operating mode, transfer
format, etc., is changed, the TE and RE bits must be cleared to 0 before making the change. When
the TE bit is cleared to 0, the TDRE flag is set to 1. However, clearing the RE bit to 0 does not
initialize the RDRF, PER, FER, and ORER flags, or RDR.
Note: In simultaneous transmit and receive operations, the TE and RE bits should both
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Start initialization
Clear TE and RE bits in SCR to 0
Set corresponding bit in ICR to 1
Set CKE1 and CKE0 bits in SCR
(TE and RE bits are 0)
Set data transfer format in
SMR and SCMR
Set value in BRR
Wait
1-bit interval elapsed?
Yes
Set TE or RE bit in SCR to 1, and
set RIE, TIE, TEIE, and MPIE bits
<Transfer start>
be cleared to 0 or set to 1 simultaneously.

Figure 12.15 Sample SCI Initialization Flowchart

Section 12 Serial Communication Interface (SCI)
[1] Set the bit in ICR for the corresponding
pin when receiving data or using an
external clock.
[1]
[2] Set the clock selection in SCR. Be sure
to clear bits RIE, TIE, TEIE, and MPIE,
and bits TE and RE, to 0.
[3] Set the data transfer format in SMR and
[2]
SCMR.
[4] Write a value corresponding to the bit
[3]
rate to BRR. This step is not necessary
if an external clock is used.
[5] Wait at least one bit interval, then set
[4]
the TE bit or RE bit in SCR to 1.
Also set the RIE, TIE TEIE, and MPIE
bits. Setting the TE and RE bits enables
the TxD and RxD pins to be used.
No
[5]
Rev. 3.00 Mar. 14, 2006 Page 423 of 804
REJ09B0104-0300