General Status Register (Gsr) - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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Section 13 Controller Area Network (HCAN)
Bit
Bit Name
0
MCR0
13.3.2

General Status Register (GSR)

GSR indicates the status of the HCAN.
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
7 to 4
3
GSR3
Rev. 3.00 Mar. 14, 2006 Page 454 of 804
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Initial
Value
R/W
1
R/W
7
6
5
0
0
0
R
R
R
Initial
Value
R/W
All 0
R
1
R
Description
Reset Request
When this bit is set to 1, the HCAN enters reset
mode. For details, refer to section 13.4.1,
Hardware and Software Resets.
[Setting conditions]
Writing 1 (software reset)
[Clearing condition]
When 0 is written to this bit while bit GSR3 in
GSR is 1
4
3
2
GSR3
GSR2
0
1
1
R
R
R
Description
Reserved
These are read-only bits and cannot be modified.
Reset Status
Indicates whether the HCAN module is in the
normal operation state or the reset state. This bit
cannot be modified.
[Setting conditions]
When entering configuration mode after the
HCAN internal reset has finished
Sleep mode
[Clearing condition]
When entering the normal operation state after
bit MCR0 in MCR is cleared (note that there is
delay between clearing bits MCR0 and GSR3.)
1
0
GSR0
GSR1
0
0
R
R

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