Timer Start Register (Tstr) - Renesas H8SX/1520 Series Hardware Manual

9.3.8

Timer Start Register (TSTR)

TSTR starts or stops operation for channels 0 to 5. When setting the operating mode in TMDR or
setting the count clock in TCR, first stop the TCNT counter.
Bit
Bit Name
Initial Value
R/W
Bit Bit Name

7, 6
5 CST5
4 CST4
3 CST3
2 CST2
1 CST1
0 CST0
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7 6
— — CST5
0 0
R/W R/W R/W
Initial
value R/W
All 0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
5 4 3
CST4 CST3
0 0 0
R/W R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Counter Start 5 to 0
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but the
TIOC pin output compare output level is retained. If TIOR
is written to when the CST bit is cleared to 0, the pin
output level will be changed to the set initial output value.
0: TCNT_5 to TCNT_0 count operation is stopped
1: TCNT_5 to TCNT_0 performs count operation
Section 9 16-Bit Timer Pulse Unit (TPU)
2 1
CST2 CST1
0 0
R/W R/W
Rev. 3.00 Mar. 14, 2006 Page 297 of 804
REJ09B0104-0300
0
CST0
0
R/W