Renesas H8SX/1520 Series Hardware Manual page 428

Section 12 Serial Communication Interface (SCI)
Bit Functions in Normal Serial Communication Interface Mode (When SMIF in SCMR = 0):
Bit Bit Name
7 TDRE
6 RDRF
Rev. 3.00 Mar. 14, 2006 Page 390 of 804
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Initial
Value R/W Description
1 R/(W)* Transmit Data Register Empty
Indicates whether TDR contains transmit data.
[Setting conditions]
•
•
[Clearing conditions]
•
•
0 R/(W)* Receive Data Register Full
Indicates whether receive data is stored in RDR.
[Setting condition]
•
[Clearing conditions]
•
•
The RDRF flag is not affected and retains its previous
value when the RE bit in SCR is cleared to 0.
Note that when the next serial reception is completed
while the RDRF flag is being set to 1, an overrun error
occurs and the received data is lost.
When the TE bit in SCR is 0
When data is transferred from TDR to TSR
When 0 is written to TDRE after reading TDRE = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
When a TXI interrupt request is issued allowing
DMAC to write data to TDR
When serial reception ends normally and receive data
is transferred from RSR to RDR
When 0 is written to RDRF after reading RDRF = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
When an RXI interrupt request is issued allowing
DMAC to read data from RDR