Transmit Wait Cancel Register (Txcr) - Renesas H8SX/1520 Series Hardware Manual

Section 13 Controller Area Network (HCAN)
13.3.6

Transmit Wait Cancel Register (TXCR)

TXCR cancels transmit wait messages in mailboxes.
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit Bit Name
15 TXCR7
14 TXCR6
13 TXCR5
12 TXCR4
11 TXCR3
10 TXCR2
9 TXCR1

8
7 TXCR15
6 TXCR14
5 TXCR13
4 TXCR12
3 TXCR11
2 TXCR10
1 TXCR9
0 TXCR8
Rev. 3.00 Mar. 14, 2006 Page 460 of 804
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15 14
TXCR7 TXCR6 TXCR5
0 0
R/W R/W
7 6
TXCR15 TXCR14 TXCR13
0 0
R/W R/W
Initial
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13 12 11
TXCR4 TXCR3
0 0 0
R/W R/W R/W
5 4 3
TXCR12 TXCR11
0 0 0
R/W R/W R/W
R/W Description
R/W
These bits cancel the transmit wait message in the
corresponding mailboxes 1 to 15. When TXCRn (n
R/W
= 1 to 15) is set to 1, the transmit wait message in
R/W
mailbox n is canceled.
R/W
[Clearing condition]
R/W
•
Completion of TXPR clearing when transmit
R/W
message is canceled normally
R/W
Bit 8 is reserved. This is a read-only bit and cannot
be modified.
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
10 9
TXCR2 TXCR1
0 0
R/W R/W
2 1
TXCR10 TXCR9 TXCR8
0 0
R/W R/W R/W
8
—
0
R
0
0