Serial Data Reception (Except In Block Transfer Mode); Figure 12.29 Data Re-Transfer Operation In Sci Reception Mode - Renesas H8SX/1520 Series Hardware Manual

12.7.7

Serial Data Reception (Except in Block Transfer Mode)

Data reception in smart card interface mode is similar to that in normal serial communication
interface mode. Figure 12.29 shows the data re-transfer operation during reception.
1. If a parity error is detected in receive data, the PER bit in SSR is set to 1. Here, an ERI
interrupt request is generated if the RIE bit in SCR is set to 1. Clear the PER bit to 0 before the
next parity bit is sampled.
2. For the frame in which a parity error is detected, the RDRF bit in SSR is not set to 1.
3. If no parity error is detected, the PER bit in SSR is not set to 1.
4. In this case, data is determined to have been received successfully, and the RDRF bit in SSR is
set to 1. Here, an RXI interrupt request is generated if the RIE bit in SCR is set to 1.
Figure 12.30 shows a sample flowchart for reception. All the processing steps are automatically
performed using an RXI interrupt request to activate the DMAC. In reception, setting the RIE bit
to 1 allows an RXI interrupt request to be generated when the RDRF flag is set to 1. This activates
the DMAC by an RXI request thus allowing transfer of receive data if the RXI interrupt request is
specified as a source of DMAC activation beforehand. The RDRF flag is automatically cleared to
0 at data transfer by the DMAC. If an error occurs during reception, i.e., either the ORER or PER
flag is set to 1, a transmit/receive error interrupt (ERI) request is generated and the error flag must
be cleared. If an error occurs, the DMAC is not activated and receive data is skipped, therefore,
the number of bytes of receive data specified in the DMAC is transferred. Even if a parity error
occurs and the PER bit is set to 1 in reception, receive data is transferred to RDR, thus allowing
the data to be read.
Note: For operations in block transfer mode, see section 12.4, Operation in Asynchronous Mode.
Ds
RDRF
PER
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nth transfer frame
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE

Figure 12.29 Data Re-Transfer Operation in SCI Reception Mode

Section 12 Serial Communication Interface (SCI)
Retransfer frame
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
[2]
[1]
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(n + 1) th
transfer frame
(DE)
Ds D0 D1 D2 D3 D4
[4]
[3]
REJ09B0104-0300