Maximum Mode; Figure 2.5 Stack Structure (Middle And Advanced Modes) - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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• Stack Structure
The stack structure of PC at a subroutine branch and that of PC and CCR at an exception
handling are shown in figure 2.5. The PC contents are saved or restored in 24-bit units.
2.2.4

Maximum Mode

The program area is extended to 4 Gbytes as compared with that in advanced mode.
• Address Space
The maximum address space of 4 Gbytes can be linearly accessed.
• Extended Registers (En)
The extended registers (E0 to E7) can be used as 16-bit registers or as the upper 16-bit
segments of 32-bit registers or address registers.
• Instruction Set
All instructions and addressing modes can be used.
• Exception Vector Table and Memory Indirect Branch Addresses
In maximum mode, the top area starting at H'00000000 is allocated to the exception vector
table. One branch address is stored per 32 bits. The structure of the exception vector table is
shown in figure 2.6.
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Reserved
SP
PC
(24 bits)
(a) Subroutine Branch
Notes: 1.
When EXR is not used it is not stored on the stack.
2.
SP when EXR is not used.
3.
Ignored on return.

Figure 2.5 Stack Structure (Middle and Advanced Modes)

1
SP
EXR*
Reserved*
2
*
(SP
)
CCR
PC
(24 bits)
(b) Exception Handling
Rev. 3.00 Mar. 14, 2006 Page 25 of 804
Section 2 CPU
1
3
,*
REJ09B0104-0300

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