Figure 21.8 I/O Port Input/Output Timing; Figure 21.9 Data Input Timing For Realtime Input Port - Renesas H8SX/1520 Series Hardware Manual

Item
SSU Slave access time
Slave out release time
Note: Although the HCAN input signals are asynchronous signals, they are received as the
*
signals in synchronization with every other rising edge of the Pφ clock (see figure
21.16). The HCAN output signals are also asynchronous signals, however, change their
levels based on every other rising edge of the Pφ clock.
Pφ
IRQ14
Port H input
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Pφ
Ports 1 to 6, A, D,
H, J, K (read)
Ports 1 to 3, 6, A, D,
H, J, K (write)

Figure 21.8 I/O Port Input/Output Timing

Figure 21.9 Data Input Timing for Realtime Input Port

Symbol Min. Max.

t 1
SA

t 1
REL
T1 T2
t t
PRS PRH
t
RTIPH
Rev. 3.00 Mar. 14, 2006 Page 771 of 804
Section 21 Electrical Characteristics
Unit Test Conditions
t Figure 21.19
cyc
t Figure 21.20
cyc
t
PWD
REJ09B0104-0300