Figure 14.6 Flowchart Example Of Data Transmission (Ssu Mode) - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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[1]
[2]
Read TDRE in SSSR
Write transmit data to SSTDR
TDRE automatically cleared
Data transferred from SSTDR to SSTRSR
Set TDRE to 1 to start transmission
[3]
Consecutive data transmission?
Read TEND in SSSR
Confirm that TEND is cleared to 0
[4]
Clear TE in SSER to 0
Note: Hatching boxes represent SSU internal operations.
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Start
Initial setting
TDRE = 1?
Yes
No
TEND = 1?
Yes
Clear TEND to 0
One bit time
quantum elapsed?
Yes
End transmission

Figure 14.6 Flowchart Example of Data Transmission (SSU Mode)

Section 14 Synchronous Serial Communication Unit (SSU)
[1] Initial setting:
Specify the transmit data format.
[2] Check that the SSU state and write transmit data:
Write transmit data to SSTDR after reading and confirming
that the TDRE bit is 1. The TDRE bit is automatically cleared
to 0 and transmission is started by writing data to SSTDR.
No
[3] Procedure for consecutive data transmission:
To continue data transmission, confirm that the TDRE bit is 1
meaning that SSTDR is ready to be written to. After that, data
can be written to SSTDR. The TDRE bit is automatically
cleared to 0 by writing data to SSTDR.
[4] Procedure for data transmission end:
To end data transmission, confirm that the TEND bit is cleared
to 0. After completion of transmitting the last bit, clear the TE
bit to 0.
Yes
No
No
Rev. 3.00 Mar. 14, 2006 Page 533 of 804
REJ09B0104-0300

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