When an interrupt by an extended repeat area overflow is used in block transfer mode, the
following should be taken into consideration.
When a transfer is stopped by an interrupt by an extended repeat area overflow, the address
register must be set so that the block size is a power of 2 or the block size boundary is aligned with
the extended repeat area boundary. When an overflow on the extended repeat area occurs during a
transfer of one block, the interrupt by the overflow is suspended and the transfer overruns.
Figure 7.16 shows examples when the extended repeat area function is used in block transfer
mode.
When the are represented by the lower three bits (eight bytes) of DSAR are specified as the extended
repeat area (SARA4 to SARA0 = 3) and the block size in block transfer mode is specified to 5 (bits 23
to 16 in DTCR = 5).
External memory
Figure 7.16 Example of Extended Repeat Area Function in Block Transfer Mode
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When the area represented by the lower three bits of DSAR (eight bytes)
is specified as the extended repeat area (SARA4 to SARA0 = B'00011)
External memory
Area specified
by DSAR
H'23FFFE
H'23FFFF
H'240000
H'240000
H'240001
H'240001
H'240002
H'240002
H'240003
H'240003
H'240004
H'240004
H'240005
H'240005
H'240006
H'240006
H'240007
H'240007
H'240008
H'240009
Figure 7.15 Example of Extended Repeat Area Operation
Area specified
by DSAR
H'23FFFE
H'23FFFF
H'240000
H'240000
H'240001
H'240001
H'240002
H'240002
H'240003
H'240003
H'240004
H'240004
H'240005
H'240005
H'240006
H'240006
H'240007
H'240007
H'240008
H'240009
Repeat
An interrupt request by extended repeat area
overflow can be generated.
1st block
2nd block
transfer
transfer
H'240000
H'240000
H'240001
H'240001
H'240002
H'240003
H'240004
H'240005
H'240006
H'240007
Rev. 3.00 Mar. 14, 2006 Page 171 of 804
Section 7 DMA Controller (DMAC)
Interrupt
request
generated
Block transfer
continued
REJ09B0104-0300