Renesas H8SX/1520 Series Hardware Manual page 332

32-bit cisc microcomputer
Hide thumbs Also See for H8SX/1520 Series:
Table of Contents

Advertisement

Section 9 16-Bit Timer Pulse Unit (TPU)
Bit
Bit Name
2
TGFC
1
TGFB
Rev. 3.00 Mar. 14, 2006 Page 294 of 804
REJ09B0104-0300
Downloaded from
Elcodis.com
electronic components distributor
Initial
value
R/W
Description
0
R/(W)* Input Capture/Output Compare Flag C
Status flag that indicates the occurrence of TGRC input
capture or compare match in channels 0 and 3.
In channels 1, 2, 4, and 5, bit 2 is reserved. It is a read-
only bit and cannot be modified.
[Setting conditions]
[Clearing conditions]
When 0 is written to TGFC after reading TGFC = 1
0
R/(W)* Input Capture/Output Compare Flag B
Status flag that indicates the occurrence of TGRB input
capture or compare match.
[Setting conditions]
[Clearing conditions]
When TCNT = TGRC while TGRC is functioning as
output compare register
When TCNT value is transferred to TGRC by input
capture signal while TGRC is functioning as input
capture register
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
When TCNT = TGRB while TGRB is functioning as
output compare register
When TCNT value is transferred to TGRB by input
capture signal while TGRB is functioning as input
capture register
When 0 is written to TGFB after reading TGFB = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)

Advertisement

Table of Contents
loading

Table of Contents