Transmit Acknowledge Register (Txack) - Renesas H8SX/1520 Series Hardware Manual

13.3.7

Transmit Acknowledge Register (TXACK)

TXACK indicates the normal transmission of transmit messages in mailboxes.
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Note: * Only 1 can be written to these bits, to clear the flags.
Bit Bit Name
15 TXACK7
14 TXACK6
13 TXACK5
12 TXACK4
11 TXACK3
10 TXACK2
9 TXACK1

8
7 TXACK15
6 TXACK14
5 TXACK13
4 TXACK12
3 TXACK11
2 TXACK10
1 TXACK9
0 TXACK8
Note: Only 1 can be written to clear the flag.
*
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15 14
TXACK7 TXACK6 TXACK5
0 0
R/(W)* R/(W)* R/(W)*
7 6
TXACK15 TXACK14 TXACK13
0 0
R/(W)* R/(W)* R/(W)*
Initial
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Section 13 Controller Area Network (HCAN)
13 12 11
TXACK4 TXACK3
0 0 0
R/(W)* R/(W)*
5 4 3
TXACK12 TXACK11
0 0 0
R/(W)* R/(W)*
R/W Description
R/(W)* These bits are status flags that indicate error-free
transmission of the transmit message in the
R/(W)*
corresponding mailboxes 1 to 15. When the
R/(W)*
message in mailbox n (n = 1 to 15) has been
transmitted error-free, TXACKn is set to 1.
R/(W)*
[Setting condition]
R/(W)*
Completion of message transmission for
R/(W)*
corresponding mailbox
R/(W)*
[Clearing condition]
R
Writing 1
R/(W)*
Bit 8 is reserved. This is a read-only bit and
R/(W)*
cannot be modified.
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
10 9
TXACK2 TXACK1
0 0
R/(W)* R/(W)*
2 1
TXACK10 TXACK9
0 0
R/(W)* R/(W)*
Rev. 3.00 Mar. 14, 2006 Page 461 of 804
REJ09B0104-0300
8
—
0
R
0
TXACK8
0
R/(W)*