Renesas H8SX/1520 Series Hardware Manual page 10

2.8.3
2.8.4
2.8.5
2.8.6
2.8.7
2.8.8
2.8.9
2.8.10 Memory Indirect-@@aa:8 ................................................................................... 60
2.8.11 Extended Memory Indirect-@@vec:7 ................................................................. 61
2.8.12 Effective Address Calculation ................................................................................ 61
2.8.13 MOVA Instruction.................................................................................................. 63
2.9 Processing States.................................................................................................................. 64
Section 3 MCU Operating Modes ....................................................................... 67
3.1 Operating Mode Selection ................................................................................................... 67
3.2 Register Descriptions........................................................................................................... 68
3.2.1
3.2.2
3.3 Operating Mode Descriptions .............................................................................................. 71
3.3.1
3.3.2
3.3.3
3.4 Address Map ........................................................................................................................ 72
3.4.1
Section 4 Exception Handling ............................................................................. 73
4.1 Exception Handling Types and Priority............................................................................... 73
4.2 Exception Sources and Exception Handling Vector Table .................................................. 74
4.3 Reset .................................................................................................................................... 76
4.3.1
4.3.2
4.3.3
4.4 Traces................................................................................................................................... 78
4.5 Address Error....................................................................................................................... 79
4.5.1
4.5.2
Rev. 3.00 Mar. 14, 2006 Page x of xxxviii
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Register Indirect with Displacement-@(d:2, ERn), @(d:16, ERn),
or @(d:32, ERn) ..................................................................................................... 55
Index Register Indirect with Displacement-@(d:16,RnL.B), @(d:32,RnL.B),
@(d:16,Rn.W), @(d:32,Rn.W), @(d:16,ERn.L), or @(d:32,ERn.L)..................... 56
Register Indirect with Post-Increment, Pre-Decrement, Pre-Increment,
or Post-Decrement-@ERn+, @−ERn, @+ERn, or @ERn− ................................ 56
Absolute Address-@aa:8, @aa:16, @aa:24, or @aa:32....................................... 58
Immediate-#xx ..................................................................................................... 59
Program-Counter Relative-@(d:8, PC) or @(d:16, PC): ..................................... 59
Program-Counter Relative with Index Register- @(RnL.B, PC),
@(Rn.W, PC), or @(ERn.L, PC)............................................................................ 59
Mode Control Register (MDCR) ............................................................................ 68
System Control Register (SYSCR)......................................................................... 69
Mode 1.................................................................................................................... 71
Mode 2.................................................................................................................... 71
Mode 3.................................................................................................................... 71
Address Map (Advanced Mode)............................................................................. 72
Reset Exception Handling ...................................................................................... 76
Interrupts after Reset............................................................................................... 77
On-Chip Peripheral Functions after Reset Release................................................. 77
Address Error Source.............................................................................................. 79
Address Error Exception Handling......................................................................... 80