Figure 17.8 Boot Mode State Transition Diagram - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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(2)
State Transition Diagram
The state transition after boot mode is initiated is shown in figure 17.8.
2.
4.
(Programming
completion)
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(Bit rate adjustment)
H'00, ..., H'00 reception
H'00 transmission
(adjustment completed)
Boot mode initiation
(reset by boot mode)
Inquiry command reception
Wait for inquiry
setting command
Inquiry command response
All user MAT and
3.
user boot MAT erasure
Read/check command
reception
Wait for
programming/erasing
command
(Erasure
completion)
(Erasure selection command
reception)
(Program data transmission)
Wait for program data

Figure 17.8 Boot Mode State Transition Diagram

Section 17 Flash Memory (0.18-(m F-ZTAT Version)
Bit rate adjustment
read/check command
Command response
(Erasure selection command reception)
Wait for erase-block
1.
Processing of
inquiry setting
command
Processing of
(Erase-block specification)
data
Rev. 3.00 Mar. 14, 2006 Page 601 of 804
REJ09B0104-0300

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