Figure 13.6 Hardware Reset Flowchart - Renesas H8SX/1520 Series Hardware Manual

(1)
IRR0 Clearing
The reset interrupt flag (IRR0) is always set after a power-on reset or recovery from software
standby mode. Since an HCAN interrupt is initiated immediately when interrupts are enabled,
IRR0 should be cleared.
Message transmission method initialization
IMR setting (interrupt mask setting)
MBIMR setting (interrupt mask setting)
MC[x] setting (receive identifier setting)
LAFM setting (receive identifier mask setting)
Can bus communication enabled
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Hardware reset
MCR0 = 1 (automatic)
IRR0 = 1 (automatic)
GSR3 = 1 (automatic)
Initialization of HCAN module
Clear IRR0
BCR setting
MBCR setting
Mailbox initialization
MCR0 = 0
GSR3 = 0?
Yes
GSR3 = 0 & 11
recessive bits received?
Yes

Figure 13.6 Hardware Reset Flowchart

Section 13 Controller Area Network (HCAN)
Bit configuration mode
Period in which BCR, MBCR, etc.,
are initialized
No
No
Rev. 3.00 Mar. 14, 2006 Page 485 of 804
: Settings by user
: Processing by hardware
REJ09B0104-0300