Renesas H8SX/1520 Series Hardware Manual page 560

Section 14 Synchronous Serial Communication Unit (SSU)
Bit Bit Name
7 SDOS
6 SSCKOS
5 SCSOS
4 TENDSTS 0
3 SCSATS
2 SSODTS
Rev. 3.00 Mar. 14, 2006 Page 522 of 804
REJ09B0104-0300
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Initial
Value R/W Description
0 R/W Serial Data Pin Open Drain Select
Selects whether the serial data output pin is used as a
CMOS or an NMOS open drain output. Pins to output
serial data differ according to the register setting. For
details, 14.4.3, Relationship between Data Input/Output
Pins and Shift Register.
0: CMOS output
1: NMOS open drain output
0 R/W SSCK Pin Open Drain Select
Selects whether the SSCK pin is used as a CMOS or
an NMOS open drain output.
0: CMOS output
1: NMOS open drain output
SCS Pin Open Drain Select
0 R/W
Selects whether the SCS pin is used as a CMOS or an
NMOS open drain output.
0: CMOS output
1: NMOS open drain output
R/W Selects the timing of setting the TEND bit (valid in SSU
and master mode).
0: Sets the TEND bit when the last bit is being
1: Sets the TEND bit after the last bit is transmitted
Selects the assertion timing of the SCS pin (valid in
0 R/W
SSU and master mode).
0: Min. values of t
1: Min. values of t
0 R/W Selects the data output timing of the SSO pin (valid in
SSU and master mode)
0: While BIDE = 0, MSS = 1, and TE = 1 or while BIDE
1: While BIDE = 0, MSS = 1, and TE = 1 or while BIDE
transmitted
and t
LEAD
and t
LEAD
= 1, TE = 1, and RE = 0, the SSO pin outputs data
= 1, TE = 1, and RE = 0, the SSO pin outputs data
while the SCS pin is driven low
are 1/2 × t
LAG SUcyc
are 3/2 × t
LAG SUcyc