Renesas H8SX/1520 Series Hardware Manual page 138

32-bit cisc microcomputer
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Section 5 Interrupt Controller
Bit
Bit Name
7
IRQ3SR
6
IRQ3SF
5
IRQ2SR
4
IRQ2SF
3
IRQ1SR
2
IRQ1SF
1
IRQ0SR
0
IRQ0SF
Rev. 3.00 Mar. 14, 2006 Page 100 of 804
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Initial
Value
R/W
Description
0
R/W
IRQ3 Sense Control Rise
IRQ3 Sense Control Fall
0
R/W
00: Interrupt request generated by low level of IRQ3
01: Interrupt request generated at falling edge of IRQ3
10: Interrupt request generated at rising edge of IRQ3
11: Interrupt request generated at both falling and rising
0
R/W
IRQ2 Sense Control Rise
IRQ2 Sense Control Fall
0
R/W
00: Interrupt request generated by low level of IRQ2
01: Interrupt request generated at falling edge of IRQ2
10: Interrupt request generated at rising edge of IRQ2
11: Interrupt request generated at both falling and rising
0
R/W
IRQ1 Sense Control Rise
IRQ1 Sense Control Fall
0
R/W
00: Interrupt request generated by low level of IRQ1
01: Interrupt request generated at falling edge of IRQ1
10: Interrupt request generated at rising edge of IRQ1
11: Interrupt request generated at both falling and rising
0
R/W
IRQ0 Sense Control Rise
IRQ0 Sense Control Fall
0
R/W
00: Interrupt request generated by low level of IRQ0
01: Interrupt request generated at falling edge of IRQ0
10: Interrupt request generated at rising edge of IRQ0
11: Interrupt request generated at both falling and rising
edges of IRQ3
edges of IRQ2
edges of IRQ1
edges of IRQ0

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