Dma Block Size Register (Dbsr) - Renesas H8SX/1520 Series Hardware Manual

7.2.5

DMA Block Size Register (DBSR)

DBSR specifies the repeat size or block size. DBSR is enabled in repeat transfer mode and block
transfer mode and is disabled in normal transfer mode.
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit Bit Name
31 to 16 BKSZH31 to
BKSZH16
15 to 0 BKSZ15 to
BKSZ0
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31 30
BKSZH31 BKSZH30 BKSZH29
0 0
R/W R/W
23 22
BKSZH23 BKSZH22 BKSZH21
0 0
R/W R/W
15 14
BKSZ15 BKSZ14 BKSZ13
0 0
R/W R/W
7 6
BKSZ7 BKSZ6 BKSZ5
0 0
R/W R/W
Initial
Value R/W
Undefined R/W
Undefined R/W
29 28 27
BKSZH28 BKSZH27
0 0 0
R/W R/W R/W
21 20 19
BKSZH20 BKSZH19
0 0 0
R/W R/W R/W
13 12 11
BKSZ12 BKSZ11
0 0 0
R/W R/W R/W
5 4 3
BKSZ4 BKSZ3
0 0 0
R/W R/W R/W
Description
Specify the repeat size or block size.
When H'0001 is set, the repeat or block size is one byte,
one word, or one longword. When H'0000 is set, it
means the maximum value (refer to table 7.1). While the
DMA is in operation, the setting is fixed.
Indicate the remaining repeat or block size while the
DMA is in operation. The value is decremented by 1
every time data is transferred. When the remaining size
becomes 0, the value of the BKSZH bits is loaded. Set
the same value as the BKSZH bits.
Section 7 DMA Controller (DMAC)
26 25
BKSZH26 BKSZH25
0 0
R/W R/W
18 17
BKSZH18 BKSZH17
0 0
R/W R/W
10 9
BKSZ10 BKSZ9
0 0
R/W R/W
2 1
BKSZ2 BKSZ1
0 0
R/W R/W
Rev. 3.00 Mar. 14, 2006 Page 141 of 804
REJ09B0104-0300
24
BKSZH24
0
R/W
16
BKSZH16
0
R/W
8
BKSZ8
0
R/W
0
BKSZ0
0
R/W