Register Descriptions - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer

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Section 14 Synchronous Serial Communication Unit (SSU)

Register Descriptions

The SSU has the following registers.

(1) Channel 0

• SS control register H_0 (SSCRH_0)

• SS control register L_0 (SSCRL_0)

• SS mode register_0 (SSMR_0)

• SS enable register_0 (SSER_0)

• SS status register_0 (SSSR_0)

• SS control register 2_0 (SSCR2_0)

• SS transmit data register 0_0 (SSTDR0_0)

• SS transmit data register 1_0 (SSTDR1_0)

• SS transmit data register 2_0 (SSTDR2_0)

• SS transmit data register 3_0 (SSTDR3_0)

• SS receive data register 0_0 (SSRDR0_0)

• SS receive data register 1_0 (SSRDR1_0)

• SS receive data register 2_0 (SSRDR2_0)

• SS receive data register 3_0 (SSRDR3_0)

• SS shift register_0 (SSTRSR_0)

Rev. 3.00 Mar. 14, 2006 Page 512 of 804

REJ09B0104-0300

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