Table 9.33 Pwm Output Registers And Output Pins - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer

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Section 9 16-Bit Timer Pulse Unit (TPU)

PWM output is generated using one TGR as the cycle register and the others as duty cycle

registers. The output specified in TIOR is performed by means of compare matches. Upon counter

clearing by a cycle register compare match, the output value of each pin is the initial value set in

TIOR. If the set values of the cycle and duty cycle registers are identical, the output value does not

change when a compare match occurs.

In PWM mode 2, a maximum 15-phase PWM output is possible by combined use with

synchronous operation.

The correspondence between PWM output pins and registers is shown in table 9.33.

Table 9.33 PWM Output Registers and Output Pins

Note: In PWM mode 2, PWM output is not possible for the TGR register in which the cycle is set.

Rev. 3.00 Mar. 14, 2006 Page 314 of 804

REJ09B0104-0300

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