Table 9.23 Tiorh_0 - Renesas H8SX/1520 Series Hardware Manual

Section 9 16-Bit Timer Pulse Unit (TPU)

Table 9.23 TIORH_0

Bit 3 Bit 2
IOA3 IOA2
0 0
0 0
0 0
0 0
0 1
0 1
0 1
0 1
1 0
1 0
1 0
1 1
[Legend]
X: Don't care
Note: When bits TPSC2 to TPSC0 in TCR_1 are set to B'000 and Pφ/1 is used as the
*
TCNT_1 counter clock, this setting is ignored and an input capture interrupt is not
generated.
Rev. 3.00 Mar. 14, 2006 Page 282 of 804
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Bit 1 Bit 0 TGRA_0
IOA1 IOA0 Function
0 0 Output
compare
0 1
register
1 0
1 1
0 0
0 1
1 0
1 1
0 1 Input
capture
register
0 0
1 X
X X
Description
TIOCA0 Pin Function
Output disabled
Initial output is 0 output
0 output at compare match
Initial output is 0 output
1 output at compare match
Initial output is 0 output
Toggle output at compare match
Output disabled
Initial output is 1 output
0 output at compare match
Initial output is 1 output
1 output at compare match
Initial output is 1 output
Toggle output at compare match
Capture input source is TIOCA0 pin
Input capture at rising edge
Capture input source is TIOCA0 pin
Input capture at rising edge
Capture input source is TIOCA0 pin
Input capture at both edges
Capture input source is channel 1/count clock
Input capture* at TCNT_1 count-up/count-down