Figure 2.6 Exception Vector Table (Maximum Modes); Figure 2.7 Stack Structure (Maximum Mode) - Renesas H8SX/1520 Series Hardware Manual

Section 2 CPU
The memory indirect (@@aa:8) and extended memory indirect (@@vec:7) addressing modes
are used in the JMP and JSR instructions. An 8-bit absolute address included in the instruction
code specifies a memory location. Execution branches to the contents of the memory location.
In maximum mode, an operand is a 32-bit (longword) operand, providing a 32-bit branch
address.
• Stack Structure
The stack structure of PC at a subroutine branch and that of PC and CCR at an exception
handling are shown in figure 2.7. The PC contents are saved or restored in 32-bit units. The
EXR contents are saved or restored regardless of whether or not EXR is in use.
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H'00000000
H'00000001
Reset exception vector
H'00000002
H'00000003
H'00000004
H'00000005
H'00000006
H'00000007

Figure 2.6 Exception Vector Table (Maximum Modes)

SP
PC
(32 bits)
(a) Subroutine Branch

Figure 2.7 Stack Structure (Maximum Mode)

Exception vector table
SP EXR
CCR
PC
(32 bits)
(b) Exception Handling