Renesas H8SX/1520 Series Hardware Manual page 829

Item
17.7.2 Programming/Erasing
Interface Parameters
Table 17.4 Parameters and Target
Modes
17.7.2 Programming/Erasing
Interface Parameters
(b) Programming
•
Bit 4
17.7.2 Programming/Erasing
Interface Parameters
(c) Erasure
•
Bit 4
(6) Flash Erase Block Select
Parameter (FEBS: General
Register ER0 of CPU)
17.8.2 User Program Mode
(1) On-Chip RAM Address Map
when Programming/Erasing is
Executed
Figure 17.10 RAM Map when
Programming/Erasing is Executed
Downloaded from Elcodis.com electronic components distributor
Page Revision (See Manual for Details)
586 Amended
Parameter Download
O
DPFR

FPFR

FPEFEQ

FMPAR

FMPDR

FEBS
590 Amended
Checks the FKEY value (H'5A) before erasure starts,
and returns the result.
593 Amended
Checks the FKEY value (H'5A) before erasure starts,
and returns the result.
Amended
FEBS specifies the erase block number. Settable
values for the erase block numbers range from 0 to 11
(H'00000000 to H'0000000B). A value of 0 corresponds
to block EB0 and a value of 11 corresponds to block
EB11. An error occurs when a value outside the range
(from 0 to 11) is set.
Amended
Area to be
downloaded
(size: 4 kbytes)
Unusable area during
programming/erasing
DPFR
FTDAR setting
(Return value: 1 byte)
System use area
(15 bytes)
FTDAR setting + 16 bytes
Programming/erasing
program entry
FTDAR setting + 32 bytes
Initialization program
entry
Initialization +
programming program
or
Initialization +
erasing program
FTDAR setting + 4 kbytes
RAM emulation area or
area that can be used
by user
Area that can be used
by user
H'FFBFFF
Rev. 3.00 Mar. 14, 2006 Page 791 of 804
REJ09B0104-0300