Renesas H8SX/1520 Series Hardware Manual page 633

32-bit cisc microcomputer
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Flash Multipurpose Address Area Parameter (FMPAR: General Register ER1 of CPU)
FMPAR stores the start address of the programming destination on the user MAT.
When an address in an area other than the flash memory is set, or the start address of the
programming destination is not aligned with the 128-byte boundary, an error occurs. The error
occurrence is indicated by the WA bit in FPFR.
Bit
Bit Name
Bit
Bit Name
Bit
Bit Name
Bit
Bit Name
Bit
Bit Name
31 to 0
MOA31 to
MOA0
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31
30
MOA31
MOA30
MOA29
23
22
MOA23
MOA22
MOA21
15
14
MOA15
MOA14
MOA13
7
6
MOA7
MOA6
MOA5
Initial
Value
R/W
R/W
Section 17 Flash Memory (0.18-(m F-ZTAT Version)
29
28
27
MOA28
MOA27
21
20
19
MOA20
MOA19
13
12
11
MOA12
MOA11
5
4
3
MOA4
MOA3
Description
These bits store the start address of the programming
destination on the user MAT. Consecutive 128-byte
programming is executed starting from the specified
start address of the user MAT. Therefore, the specified
start address of the programming destination becomes a
128-byte boundary, and MOA6 to MOA0 are always
cleared to 0.
26
25
MOA26
MOA25
18
17
MOA18
MOA17
10
9
MOA10
MOA9
2
1
MOA2
MOA1
Rev. 3.00 Mar. 14, 2006 Page 595 of 804
REJ09B0104-0300
24
MOA24
16
MOA16
8
MOA8
0
MOA0

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