Table 13.3 Setting Range For Tseg1 And Tseg2 In Bcr - Renesas H8SX/1520 Series Hardware Manual

Section 13 Controller Area Network (HCAN)
Time quanta (tq) is an integer multiple of the number of system clocks, and is determined by the
baud rate prescaler (BRP) as follows. f
tq = 2 × (BPR setting + 1)/f
The following formula is used to calculate the 1-bit time and bit rate.
1-bit time = tq × (3 + TSEG1 + TSEG2)
Bit rate = 1/Bit time
/{2 × (BPR setting + 1) × (3 + TSEG1 + TSEG2)}
= f
CLK
Note: f = Pφ (peripheral module clock)
CLK
A BCR value is used for BRP, TSEG1, and TSEG2.
Example: With a peripheral module clock (Pφ) of 20 MHz, a BRP setting of B'000000, a TSEG1
setting of B'0100, and a TSEG2 setting of B'011:
Bit rate = 20/{2 × (0 + 1) × (3 + 4 + 3)} = 1 Mbps

Table 13.3 Setting Range for TSEG1 and TSEG2 in BCR

TSEG1
(BCR11 to BCR8) 001
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Notes: The time quantum values for TSEG1 and TSEG2 are determined by TSEG value + 1.
Settable when BRP is not B'000000.
*
Rev. 3.00 Mar. 14, 2006 Page 488 of 804
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CLK
CLK
010
No Yes
Yes* Yes
Yes* Yes
Yes* Yes
Yes* Yes
Yes* Yes
Yes* Yes
Yes* Yes
Yes* Yes
Yes* Yes
Yes* Yes
Yes* Yes
Yes* Yes
is the frequency of the peripheral module clock (Pφ).
TSEG2 (BCR14 to BCR12)
011 100
No No
Yes No
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
101 110
No No
No No
No No
Yes No
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
Yes Yes
111
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes