Interrupt Priority Registers A To G, I, K To O, Q, And R (Ipra To Iprg, Ipri, Iprk To Ipro, Iprq, And Iprr) - Renesas H8SX/1520 Series Hardware Manual

Section 5 Interrupt Controller
5.3.3 Interrupt Priority Registers A to G, I, K to O, Q, and R (IPRA to IPRG, IPRI,
IPRK to IPRO, IPRQ, and IPRR)
IPR sets priory (levels 7 to 0) for interrupts other than NMI.
Setting a value in the range from B'000 to B'111 in the 3-bit groups of bits 14 to 12, 10 to 8, 6 to 4,
and 2 to 0 assigns a priority level to the corresponding interrupt. For the correspondence between
the interrupt sources and the IPR settings, see table 5.2.
Bit 15
Bit Name —
Initial Value 0
R/W R
Bit 7
Bit Name —
Initial Value 0
R/W R
Bit Bit Name

15
14 IPR14
13 IPR13
12 IPR12

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14 13
IPR14 IPR13
1 1
R/W R/W
6 5
IPR6 IPR5
1 1
R/W R/W
Initial
Value R/W Description
0 R Reserved
This is a read-only bit and cannot be modified.
1 R/W Sets the priority level of the corresponding interrupt
source.
1 R/W
000: Priority level 0 (lowest)
1 R/W
001: Priority level 1
010: Priority level 2
011: Priority level 3
100: Priority level 4
101: Priority level 5
110: Priority level 6
111: Priority level 7 (highest)
0 R Reserved
This is a read-only bit and cannot be modified.
12 11
IPR12 — IPR10
1 0
R/W R
4 3
IPR4 — IPR2
1 0
R/W R
10 9
IPR9 IPR8
1 1
R/W R/W R/W
2 1
IPR1 IPR0
1 1
R/W R/W R/W
8
1
0
1