Figure 9.19 Example Of Cascaded Operation (1); Figure 9.20 Example Of Cascaded Operation (2) - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer

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Section 9 16-Bit Timer Pulse Unit (TPU)

Examples of Cascaded Operation

Figure 9.19 illustrates the operation when counting upon TCNT_2 overflow/underflow has been

set for TCNT_1, TGRA_1 and TGRA_2 have been designated as input capture registers, and the

TIOC pin rising edge has been selected.

When a rising edge is input to the TIOCA1 and TIOCA2 pins simultaneously, the upper 16 bits of

the 32-bit data are transferred to TGRA_1, and the lower 16 bits to TGRA_2.

Figure 9.20 illustrates the operation when counting upon TCNT_2 overflow/underflow has been

set for TCNT_1, and phase counting mode has been designated for channel 2.

TCNT_1 is incremented by TCNT_2 overflow and decremented by TCNT_2 underflow.

Rev. 3.00 Mar. 14, 2006 Page 312 of 804

REJ09B0104-0300

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Figure 9.19 Example of Cascaded Operation (1)

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