Figure 14.16 Flowchart Example Of Data Reception - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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[1]
No
Consecutive data reception?
Read received data in SSRDR
RDRF automatically cleared
[3]
Read receive data in SSRDR
[4]
Overrun error processing
(4)
Data Transmission/Reception
Figure 14.17 shows a flowchart example of simultaneous transmission/reception. The data
transmission/reception is performed combining the data transmission and data reception as
mentioned above. The data transmission/reception is started by writing transmit data to SSTDR
with TE = RE = 1.
Before switching transmission mode (TE = 1) or reception mode (RE = 1) to
transmission/reception mode (TE = RE = 1), clear the TE and RE bits to 0. When starting the
transfer, confirm that the TEND, RDRF, and ORER bits are cleared to 0 before setting the TE or
RE bits to 1.
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Start
Initial setting
Read SSSR
RDRF = 1?
Yes
ORER = 1?
No
Yes
RE = 0
End reception
Clear ORER in SSSR
End reception

Figure 14.16 Flowchart Example of Data Reception

(Clock Synchronous Communication Mode)
Section 14 Synchronous Serial Communication Unit (SSU)
[1]
Initial setting:
Specify the receive data format.
[2], [4] Receive error processing:
When a receive error occurs, execute the designated error
processing after reading the ORER bit in SSSR. After that,
clear the ORER bit to 0. While the ORER bit is set to 1,
transmission or reception is not resumed.
[3]
To complete reception:
To complete reception, read receive data after clearing the
RE bit to 0. When reading SSRDR without clearing the RE
Yes
[2]
bit, reception is resumed.
No
Note: Hatching boxes represent SSU internal operations.
Rev. 3.00 Mar. 14, 2006 Page 543 of 804
REJ09B0104-0300

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