Renesas H8SX/1520 Series Hardware Manual page 839

Module stop mode .................................. 679
Multi-clock function ....................... 128, 679
Multiprocessor bit................................... 416
Multiprocessor communication
function................................................... 416
N
NMI interrupt.......................................... 103
Nonlinearity error ................................... 561
Non-overlapping pulse output ................ 359
Normal transfer mode ............................. 162
O
Offset error ............................................. 561
On-board programming .......................... 599
On-board programming mode ................ 569
On-chip baud rate generator ................... 408
Open-drain control register..................... 215
Oscillator ................................................ 665
Output buffer control .............................. 216
Output trigger ......................................... 358
Overflow................................................. 372
P
Package....................................................... 1
Package dimensions................................ 781
Parity bit ................................................. 405
Peripheral module clock (Pφ) ......... 128, 661
Pin assignments .......................................... 4
Pin configuration in each operating mode .. 6
Pin functions ............................................. 10
PLL circuit...................................... 661, 666
Port function controller........................... 243
Port H realtime input data register.......... 215
Port register............................................. 213
Port states in each pin state ..................... 779
Power-down modes ................................ 671
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Processing states ....................................... 64
Product lineup ......................................... 780
Program execution state ............................ 64
Program stop state..................................... 64
Programmable pulse generator (PPG)..... 345
Programmer mode................................... 630
Programming/erasing interface ............... 575
Programming/erasing interface
parameters............................................... 586
Programming/erasing interface register .. 579
Protection ................................................ 623
Pull-up MOS control register.................. 214
PWM modes ........................................... 313
Q
Quantization error ................................... 561
R
RAM ....................................................... 567
Register addresses................................... 688
Register bits ............................................ 711
Register configuration in each port ......... 210
Register states in each operating mode ... 738
Registers
ABACK ...................... 462, 688, 711, 738
ADCR ......................... 555, 708, 735, 757
ADCSR ....................... 553, 708, 735, 757
ADDR ......................... 552, 708, 735, 757
BCR ............................ 456, 688, 711, 738
BCR2 .......................... 126, 705, 732, 754
BRR ............................ 398, 706, 732, 755
CCR ...................................................... 30
CPUPCR ....................... 90, 707, 734, 756
DACR ......................... 151, 703, 728, 753
DBSR .......................... 141, 703, 727, 753
DDAR ......................... 138, 703, 727, 753
DDR............................ 212, 702, 726, 752
DMDR ........................ 142, 703, 727, 753
Rev. 3.00 Mar. 14, 2006 Page 801 of 804
REJ09B0104-0300