Renesas H8SX/1520 Series Hardware Manual page 193

Bit Bit Name
4 DARA4
3 DARA3
2 DARA2
1 DARA1
0 DARA0
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Initial
Value R/W Description
0 R/W Destination Address Extended Repeat Area
0 R/W Specify the extended repeat area on the destination
address (DDAR). With the extended repeat area, the
0 R/W
specified lower address bits are updated and the
0 R/W
remaining upper address bits are fixed. The extended
repeat area size is specified from four bytes to 128
0 R/W
Mbytes in units of byte and a power of 2.
When the lower address is overflowed from the
extended repeat area by address update, the address
becomes the start address and the end address of the
area for address addition and subtraction, respectively.
When an overflow in the extended repeat area occurs
with the DARIE bit set to 1, an interrupt can be
requested. Table 7.2 shows the settings and areas of
the extended repeat area.
Section 7 DMA Controller (DMAC)
Rev. 3.00 Mar. 14, 2006 Page 155 of 804
REJ09B0104-0300