Register Descriptions; Timer Counter (Tcnt) - Renesas H8SX/1520 Series Hardware Manual

Section 11 Watchdog Timer (WDT)
11.2

Register Descriptions

The WDT has the following three registers. To prevent accidental overwriting, TCSR, TCNT, and
RSTCSR have to be written to in a method different from normal registers. For details, see section
11.5.1, Notes on Register Access.

• Timer counter (TCNT)

• Timer control/status register (TCSR)
• Reset control/status register (RSTCSR)
11.2.1 Timer Counter (TCNT)
TCNT is an 8-bit readable/writable up-counter. TCNT is initialized to H'00 when the TME bit in
TCSR is cleared to 0.
Bit
Bit Name
Initial Value
R/W
Rev. 3.00 Mar. 14, 2006 Page 368 of 804
REJ09B0104-0300
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7 6
0 0
R/W R/W R/W
5 4 3
0 0 0
R/W R/W
2 1
0 0
R/W R/W R/W
0
0