Figure 14.5 Example Of Transmission Operation (Ssu Mode) - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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Section 14 Synchronous Serial Communication Unit (SSU)
(1) When 8-bit data length is selected (SSTDR0 is valid) with CPOS = 0 and CPHS = 0
SCS
SSCK
SSO
TDRE
TEND
LSI operation
User operation
(2) When 16-bit data length is selected (SSTDR0 and SSTDR1 are valid) with CPOS = 0 and CPHS = 0
SCS
SSCK
SSO
(LSB first)
SSO
(MSB first)
TDRE
TEND
LSI operation
User operation
(3) When 32-bit data length is selected (SSTDR0 and SSTDR3 are valid) with CPOS = 0 and CPHS = 0
SCS
SSCK
SSO
(LSB first)
SSO
(MSB first)
TDRE
TEND
LSI operation
User operation
Rev. 3.00 Mar. 14, 2006 Page 532 of 804
REJ09B0104-0300
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1 frame
Bit
Bit
Bit
Bit
0
1
2
3
SSTDR0
(LSB first transmission)
TXI interrupt
generated
Data written to SSTDR0
Bit
Bit
Bit
Bit
0
1
2
3
SSTDR1
Bit
Bit
Bit
Bit
7
6
5
4
SSTDR0
Data written to SSTDR0 and SSTDR1
Bit
Bit
Bit
to
0
7
0
SSTDR
SSTDR
Bit
Bit
Bit
to
7
0
7
SSTDR
SSTDR
Data written to SSTDR0 to SSTDR1

Figure 14.5 Example of Transmission Operation (SSU Mode)

Bit
Bit
Bit
Bit
Bit
Bit
4
5
6
7
7
6
(MSB first transmission)
TXI interrupt
TEI interrupt
generated
generated
Data written to SSTDR0
1 frame
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
4
5
6
7
0
1
2
3
SSTDR0
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
3
2
1
0
7
6
5
4
SSTDR1
TXI interrupt generated
1 frame
Bit
Bit
Bit
Bit
Bit
to
to
to
7
0
7
0
7
SSTDR
SSTDR
Bit
Bit
Bit
Bit
Bit
to
to
to
0
7
0
7
0
SSTDR
SSTDR
TXI interrupt generated TEI interrupt generated
1 frame
Bit
Bit
Bit
Bit
Bit
Bit
5
4
3
2
1
0
SSTDR0
TEI interrupt
generated
Bit
Bit
Bit
Bit
4
5
6
7
Bit
Bit
Bit
Bit
3
2
1
0
TEI interrupt generated

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