Table 9.15 Tiorh_0 - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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Section 9 16-Bit Timer Pulse Unit (TPU)

Table 9.15 TIORH_0

Bit 7
Bit 6
IOB3
IOB2
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
1
[Legend]
X: Don't care
Note: When bits TPSC2 to TPSC0 in TCR_1 are set to B'000 and Pφ/1 is used as the TCNT_1
count clock, this setting is invalid and input capture is not generated.
Rev. 3.00 Mar. 14, 2006 Page 274 of 804
REJ09B0104-0300
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Bit 5
Bit 4
TGRB_0
IOB1
IOB0
Function
0
0
Output
compare
0
1
register
1
0
1
1
0
0
0
1
1
0
1
1
0
0
Input
capture
register
0
1
1
x
x
x
Description
TIOCB0 Pin Function
Output disabled
Initial output is 0 output
0 output at compare match
Initial output is 0 output
1 output at compare match
Initial output is 0 output
Toggle output at compare match
Output disabled
Initial output is 1 output
0 output at compare match
Initial output is 1 output
1 output at compare match
Initial output is 1 output
Toggle output at compare match
Capture input source is TIOCB0 pin
Input capture at rising edge
Capture input source is TIOCB0 pin
Input capture at falling edge
Capture input source is TIOCB0 pin
Input capture at both edges
Capture input source is channel 1/count clock
Input capture at TCNT_1 count-up/count-down*

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