Renesas H8SX/1520 Series Hardware Manual page 181

• DMDR_1 to DMDR_3
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Note: * Only 0 can be written to this bit after having been read as 1, to clear the flag.
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31 30
DTE DACKE TENDE
0 0
R/W R/W R/W
23 22
ACT —
0 0
R R
15 14
DTSZ1 DTSZ0 MDS1
0 0
R/W R/W R/W
7 6
DTF1 DTF0 DTA
0 0
R/W R/W R/W
29 28 27
— DREQS
0 0 0
R/W R/W
21 20 19
— — —
0 0 0
R R R
13 12 11
MDS0 TSEIE
0 0 0
R/W R/W
5 4 3
— —
0 0 0
R R
Section 7 DMA Controller (DMAC)
26 25
NRD —
0 0
R/W R
18 17
— ESIF
0 0
R R/(W)*
10 9
— ESIE
0 0
R R/W
2 1
DMAP2 DMAP1
0 0
R/W R/W
Rev. 3.00 Mar. 14, 2006 Page 143 of 804
REJ09B0104-0300
24
—
0
R
16
DTIF
0
R/(W)*
8
DTIE
0
R/W
0
DMAP0
0
R/W