Renesas H8SX/1520 Series Hardware Manual page 331

Bit Bit Name
4 TCFV
3 TGFD
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Initial
value R/W Description
0 R/(W)* Overflow Flag
Status flag that indicates that a TCNT overflow has
occurred.
[Setting condition]
•
[Clearing condition]
•
0 R/(W)* Input Capture/Output Compare Flag D
Status flag that indicates the occurrence of TGRD input
capture or compare match in channels 0 and 3.
In channels 1, 2, 4, and 5, bit 3 is reserved. It is a read-
only bit and cannot be modified.
[Setting conditions]
•
•
[Clearing conditions]
•
Section 9 16-Bit Timer Pulse Unit (TPU)
When the TCNT value overflows (changes from
H'FFFF to H'0000)
When a 0 is written to TCFV after reading TCFV = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
When TCNT = TGRD while TGRD is functioning as
output compare register
When TCNT value is transferred to TGRD by input
capture signal while TGRD is functioning as input
capture register
When 0 is written to TGFD after reading TGFD = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
Rev. 3.00 Mar. 14, 2006 Page 293 of 804
REJ09B0104-0300