Unread Message Status Register (Umsr) - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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Section 13 Controller Area Network (HCAN)

13.3.16 Unread Message Status Register (UMSR)

UMSR indicates that a received message which has not been read is overwritten by a new receive
message. In this case, the message which has not been read is lost.
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Note: *
Only 1 can be written to these bits, to clear the flags.
Bit
Bit Name
15
UMSR7
14
UMSR6
13
UMSR5
12
UMSR4
11
UMSR3
10
UMSR2
9
UMSR1
8
UMSR0
7
UMSR15
6
UMSR14
5
UMSR13
4
UMSR12
3
UMSR11
2
UMSR10
1
UMSR9
0
UMSR8
Note:
*
Only 1 can be written to clear the flag.
Rev. 3.00 Mar. 14, 2006 Page 474 of 804
REJ09B0104-0300
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15
14
UMSR7
UMSR6
UMSR5
0
0
R/(W)*
R/(W)*
R/(W)*
7
6
UMSR15
UMSR14
UMSR13
0
0
R/(W)*
R/(W)*
R/(W)*
Initial
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13
12
11
UMSR4
UMSR3
0
0
0
R/(W)*
R/(W)*
5
4
3
UMSR12
UMSR11
0
0
0
R/(W)*
R/(W)*
R/W
Description
R/(W)*
The received message has been overwritten by a
new message before being read.
R/(W)*
[Setting condition]
R/(W)*
When a new message is received before
R/(W)*
RXPR is cleared
R/(W)*
[Clearing conditions]
R/(W)*
Writing 1
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
R/(W)*
10
9
UMSR2
UMSR1
UMSR0
0
0
R/(W)*
R/(W)*
R/(W)*
2
1
UMSR10
UMSR9
UMSR8
0
0
R/(W)*
R/(W)*
R/(W)*
8
0
0
0

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