Renesas H8SX/1520 Series Hardware Manual page 20

17.8 On-Board Programming Mode .......................................................................................... 599
17.8.1 Boot Mode ............................................................................................................ 599
17.8.2 User Program Mode.............................................................................................. 603
17.8.3 User Boot Mode.................................................................................................... 613
17.8.4 On-Chip Program and Storable Area for Program Data ....................................... 617
17.9 Protection........................................................................................................................... 623
17.9.1 Hardware Protection ............................................................................................. 623
17.9.2 Software Protection .............................................................................................. 624
17.9.3 Error Protection .................................................................................................... 624
17.10 Flash Memory Emulation Using RAM.............................................................................. 626
17.11 Switching between User MAT and User Boot MAT......................................................... 629
17.12 Programmer Mode ............................................................................................................. 630
17.13 Standard Serial Communication Interface Specifications for Boot Mode ......................... 630
17.14 Usage Notes ....................................................................................................................... 658
Section 18 Clock Pulse Generator..................................................................... 661
18.1 Register Description .......................................................................................................... 662
18.1.1 System Clock Control Register (SCKCR) ............................................................ 662
18.2 Oscillator............................................................................................................................ 665
18.2.1 Connecting Crystal Resonator .............................................................................. 665
18.2.2 External Clock Input............................................................................................. 666
18.3 PLL Circuit ........................................................................................................................ 666
18.4 Frequency Divider ............................................................................................................. 666
18.5 Usage Notes ....................................................................................................................... 667
18.5.1 Notes on Clock Pulse Generator ........................................................................... 667
18.5.2 Notes on Resonator............................................................................................... 668
18.5.3 Notes on Board Design ......................................................................................... 668
18.5.4 Notes on Input Clock Frequency .......................................................................... 669
Section 19 Power-Down Modes........................................................................ 671
19.1 Features.............................................................................................................................. 671
19.2 Register Descriptions......................................................................................................... 672
19.2.1 Standby Control Register (SBYCR) ..................................................................... 673
19.2.2 Module Stop Control Registers A and B (MSTPCRA and MSTPCRB) .............. 675
19.2.3 Module Stop Control Register C (MSTPCRC)..................................................... 678
19.3 Multi-Clock Function ........................................................................................................ 679
19.4 Module Stop Mode ............................................................................................................ 679
19.5 Sleep Mode ........................................................................................................................ 680
19.5.1 Transition to Sleep Mode...................................................................................... 680
19.5.2 Clearing Sleep Mode ............................................................................................ 680
Rev. 3.00 Mar. 14, 2006 Page xx of xxxviii
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