Hcan Monitor Register (Hcanmon) - Renesas H8SX/1520 Series Hardware Manual

13.3.20 HCAN Monitor Register (HCANMON)

HCANMON enables or disables an HCAN receive interrupt, controls transmission stop of the
HTxD pin, and reflects the states of the HCAN pins.
Bit
Bit Name
Initial Value
R/W
Bit Bit Name

7
6 TxSTP
5 HCANE

4 to 2
1 TxD
0 RxD
Downloaded from Elcodis.com electronic components distributor
7 6
— TxSTP HCANE
Undefined 0
— R/W
Initial
Value
Undefined
0
0
Undefined
Undefined
Undefined
Section 13 Controller Area Network (HCAN)
5 4 3
— —
0 Undefined Undefined
R/W — —
R/W Description

Reserved
This bit is always read as undefined value and
cannot be modified.
R/W HTxD Transmission Stop
Controls transmission stop of the HTxD pin.
0: Enables transmission from the HTxD pin
1: Fixes an output level of the HTxD pin at 1 and
transmission is stopped
R/W HCAN Output Pin Enable
0: P64 is used as an I/O port
1: P64 is used as the HTxD pin.

Reserved
These bits are always read as undefined values
and cannot be modified.
R Transmission pin
The state of the HTxD pin is read.
This bit cannot be modified.
R Reception pin
The state of the HRxD pin is read.
This bit cannot be modified.
2 1
— TxD
Undefined Undefined
— R
Rev. 3.00 Mar. 14, 2006 Page 483 of 804
REJ09B0104-0300
0
RxD
Undefined
R