This section describes the CPU12 programming model, register set, the data types
used, and basic memory organization.
2.1 Programming Model
The CPU12 programming model, shown in
M68HC11 CPU. The CPU has two 8-bit general-purpose accumulators (A and B) that
can be concatenated into a single 16-bit accumulator (D) for certain instructions. It also
has two index registers (X and Y), a 16-bit stack pointer (SP), a 16-bit program counter
(PC), and an 8-bit condition code register (CCR).
A
7
15
15
15
15
15
2.1.1 Accumulators
General-purpose 8-bit accumulators A and B are used to hold operands and results of
operations. Some instructions treat the combination of these two 8-bit accumulators
(A : B) as a 16-bit double accumulator (D).
CPU12
REFERENCE MANUAL
SECTION 2
OVERVIEW
B
0
7
D
IX
IY
SP
PC
S X H I
N
Z V C
Figure 2-1 Programming Model
OVERVIEW
Figure
2-1, is the same as that of the
0
8-BIT ACCUMULATORS A AND B
OR
0
16-BIT DOUBLE ACCUMULATOR D
0
INDEX REGISTER X
0
INDEX REGISTER Y
0
STACK POINTER
0
PROGRAM COUNTER
CONDITION CODE REGISTER
HC12 PROG MODEL
MOTOROLA
2-1