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M16C/5L Group, M16C/56 Group
28.21 Notes on Flash Memory
Note
Pins P0_4 to P0_7, P1_0 to P1_4, P3_4 to P3_7, P9_5 to P9_7 cannot be used in the 64-pin
package. For the 64-pin package, do not use these pins for the entry of user boot function.
28.21.1 OFS1 Address, OFS2 Address, and ID Code Storage Address
The OFS1 address, OFS2 address, and ID code storage address are part of flash memory. When
writing a program to flash memory, write an appropriate value to those addresses simultaneously.
In the OFS1 address, the MCU state after reset and the function to prevent rewrite in parallel I/O mode
are selected. The OFS1 address is 0FFFFFh. This is the most significant address of block 0 in program
ROM 1 and upper address of reset vector. Also, OFS2 address and the ID code storage address is in
block 0 and upper address of the interrupt vector.
The ID code check function cannot be disabled. Even if the protect using the ID code check function is
unnecessary, input the appropriate ID code when using a serial programmer or debugger. Without the
appropriate ID code, the serial programmer or debugger cannot be used.
ex) Set FEh to the OFS1 address, and set FFh to the OFS2 address
When using an address control instruction and logical addition:
.org 0FFDBH
.byte 0FFh
.org 0FFFFCh
RESET:
.lword start | 0FE000000h
When using an address control instruction:
.org 0FFDBH
.byte 0FFh
.org 0FFFFCh
RESET:
.addr start
.byte 0FEh
(Program format varies depending on the compiler. Refer to the compiler manual.)
28.21.2 Reading Data Flash
When 3.0 V < VCC ≤ 5.5 V and f(BCLK) ≥ 20 MHz, one wait must be inserted to execute the program
on the data flash and read the data. Set the PM17 in the PM1 register or FMR17 bit in the FMR1
register to insert one wait.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
28. Usage Notes
Page 797 of 803
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