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Renesas M16C/50 Series User Manual page 399

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M16C/5L Group, M16C/56 Group
18.2.13 Waveform Output Master Enable Register (G1OER)
Waveform Output Master Enable Register
b7 b6 b5 b4
b3
b2
b1
The EOCj bit (j = 0 to 7) is enabled only when the FSCj bit in the G1FS register is 0 (waveform
generation function is selected) and the IFEj bit in the G1FE register is 1 (channel j function enabled).
When an odd channel is selected in SR waveform output mode or the FSCj bit in the G1FS register is 1
(time measurement function is selected), set the EOCj bit to 1. The value written to the EOCj bit is
immediately reflected in output waveforms, independently of fBT1.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0
Symbol
G1OER
Bit Symbol
Bit Name
EOC0
OUTC1_0 output disable bit
EOC1
OUTC1_1 output disable bit
EOC2
OUTC1_2 output disable bit
EOC3
OUTC1_3 output disable bit
EOC4
OUTC1_4 output disable bit
EOC5
OUTC1_5 output disable bit
EOC6
OUTC1_6 output disable bit
EOC7
OUTC1_7 output disable bit
Address
02ECh
Function
0: Output enabled
1: Output disabled (OUTC1_0 pin is used as a
programmable I/O port)
0: Output enabled
1: Output disabled (OUTC1_1 pin is used as a
programmable I/O port)
0: Output enabled
1: Output disabled (OUTC1_2 pin is used as a
programmable I/O port)
0: Output enabled
1: Output disabled (OUTC1_3 pin is used as a
programmable I/O port)
0: Output enabled
1: Output disabled (OUTC1_4 pin is used as a
programmable I/O port)
0: Output enabled
1: Output disabled (OUTC1_5 pin is used as a
programmable I/O port)
0: Output enabled
1: Output disabled (OUTC1_6 pin is used as a
programmable I/O port)
0: Output enabled
1: Output disabled (OUTC1_7 pin is used as a
programmable I/O port)
18. Timer S
Reset Value
00h
RW
RW
RW
RW
RW
RW
RW
RW
RW
Page 362 of 803

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