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M16C/5L Group, M16C/56 Group
23.1.1.5
CPE Bit
When the CPE bit is set to 1, the function of the CAN I/O pins (CRX0 and CTR0) is enabled. To use the
CAN module, set this bit to 1.
To set the CPE bit to 1, set the port direction bit corresponding to the CRX0 pin to 0.
When the CPE bit is set to 0, the function of the port I/O pins is enabled.
Write to the CPE bit only in CAN reset mode.
To use a CAN wake-up interrupt, set the CPE bit to 1.
23.1.1.6
MBM Bit
When the MBM bit is 0 (normal mailbox mode), mailboxes [0] to [31] are configured as transmit or
receive mailboxes.
When this bit is 1 (FIFO mailbox mode), mailboxes [0] to [23] are configured as transmit or receive
mailboxes. Mailboxes [24] to [27] are configured as a transmit FIFO and mailboxes [28] to [31] as a
receive FIFO.
Transmit data is written into mailbox [24] (mailbox [24] is a window mailbox for the transmit FIFO).
Receive data is read from mailbox [28] (mailbox [28] is a window mailbox for the receive FIFO).
Table 23.3 lists the mailbox configuration.
Table 23.3
Mailbox Configuration
Mailbox
Mailboxes [0] to [23]
Mailboxes [24] to [27]
Mailboxes [28] to [31]
Note:
1.
When the MBM bit is set to 1, note the following:
• Transmit FIFO is controlled by the C0TFCR register.
The C0MCTLj register (j = 0 to 31) for mailboxes [24] to [27] is disabled.
Registers C0MCTL24 to C0MCTL27 cannot be used.
• Receive FIFO is controlled by the C0RFCR register.
The C0MCTLj register for mailboxes [28] to [31] is disabled.
Registers C0MCTL28 to C0MCTL31 cannot be used.
• Refer to the C0MIER register about the FIFO interrupts.
• The corresponding bits in the C0MKIVLR register for mailboxes [24] to [31] are disabled. Set 0 to
these bits.
• Transmit/receive FIFOs can be used for both data frames and remote frames.
23.1.1.7
IDFM Bit
The IDFM bit specifies the ID format.
When this bit is 00b, all mailboxes (including FIFO mailboxes) handle only standard IDs.
When this bit is 01b, all mailboxes (including FIFO mailboxes) handle only extended IDs.
When this bit is 10b, all mailboxes (including FIFO mailboxes) handle both standard IDs and extended
IDs. Standard IDs or extended IDs are specified by using the IDE bit in the corresponding mailbox in
normal mailbox mode. In FIFO mailbox mode, the IDE bit in the corresponding mailbox is used for
mailboxes [0] to [23], the IDE bit in registers C0FIDCR0 and C0FIDCR1 is used for the receive FIFO,
and the IDE bit in mailbox [24] is used for the transmit FIFO.
Do not set 11b to the IDFM bit.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
MBM = 0
(Normal Mailbox Mode)
Normal mailbox
MBM = 1
(FIFO Mailbox Mode)
Normal mailbox
Transmit FIFO
Receive FIFO
23. CAN Module
(1)
Page 552 of 803
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