Renesas M16C/50 Series User Manual page 190

M16C/5L Group, M16C/56 Group
NMI Digital Debounce Register (NDDR)
11.3.1
NMI Digital Debounce Register
b7
When using the NMI interrupt to exit from stop mode, set FFh to the NDDR register before entering stop
mode. The NDDR register should be written immediately after the instruction to set the PRC2 bit in the
PRCR register to 1 (write enabled). No interrupt or DMA transfer should be generated between these
two instructions.
11.3.2 P1_7 Digital Debounce Register (P17DDR)
P1_7 Digital Debounce Register
b7
When using the INT5 interrupt to exit from stop mode, set FFh to the P17DDR register before entering
stop mode.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
Symbol
b0
NDDR
With n being the setting value:
• n = 00h to FEh:
A signal with larger pulse width than
• n = FFh:
Digital debounce filter function is disabled and all signals will be
input directly.
Symbol
b0
P17DDR
With n being the setting value:
• n = 00h to FEh:
A signal with larger pulse width than
INT5.
• n = FFh:
Digital debounce filter function is disabled and all signals will be
input directly.
Address
02FEh
Function
(n + 1) x 8
is input to NMI/SD.
f1
Address
02FFh
Function
(n + 1) x 8
is input to INPC1_7/
f1
11. Programmable I/O Ports
Reset Value
FFh
Setting Range RW
00h to FFh RW
Reset Value
FFh
Setting Range RW
00h to FFh RW
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