Renesas M16C/50 Series User Manual page 280

M16C/5L Group, M16C/56 Group
15.2.12 Trigger Select Register (TRGSR)
Trigger Select Register
b7 b6 b5 b4 b3 b2 b1
TA1TGH-TA1TGL (Timer A1 event/trigger select bit) (b1-b0)
TA2TGH-TA2TGL (Timer A2 event/trigger select bit) (b3-b2)
TA3TGH-TA3TGL (Timer A3 event/trigger select bit) (b5-b4)
TA4TGH-TA4TGL (Timer A4 event/trigger select bit) (b7-b6)
These bits are used to select an event or a trigger of the following modes:
•
An event in event counter mode (when not using two-phase pulse signal processing)
•
A trigger in one-shot timer mode, PWM mode, or programmable output mode
The above applies when the MR2 bit in the TAiMR register is 1 (trigger selected by setting bits
TAiTGH to TAiTGL).
When bits TAiTGH to TAiTGL are 00b, the active edge of input signals can be selected by setting the
MR1 bit in the TAiMR register.
When bits TAiTGH to TAiTGL are set to 01b, 10b, or 11b, an event or a trigger occurs when an interrupt
request of the selected timer is generated. An event or trigger can occur while interrupts are disabled
because an interrupt request signal is generated regardless of the I flag, IPL, or interrupt control
registers.
R01UH0127EJ0110 Rev.1.10
Sep 01, 2011
b0 Symbol
TRGSR
Bit Symbol Bit Name
Timer A1 event/trigger
TA1TGL
select bit
TA1TGH
Timer A2 event/trigger
TA2TGL
select bit
TA2TGH
Timer A3 event/trigger
TA3TGL
select bit
TA3TGH
Timer A4 event/trigger
TA4TGL
select bit
TA4TGH
Address
0323h
Function
b1 b0
0 0 : Input on TA1IN selected
0 1 : TB2 selected
1 0 : TA0 selected
1 1 : TA2 selected
b3 b2
0 0 : Input on TA2IN selected
0 1 : TB2 selected
1 0 : TA1 selected
1 1 : TA3 selected
b5 b4
0 0 : Input on TA3IN selected
0 1 : TB2 selected
1 0 : TA2 selected
1 1 : TA4 selected
b7 b6
0 0 : Input on TA4IN selected
0 1 : TB2 selected
1 0 : TA3 selected
1 1 : TA0 selected
15. Timer A
Reset Value
00h
RW
RW
RW
RW
RW
RW
RW
RW
RW
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